1. Field of the Invention
The present invention relates to a capacitor substrate structure, and in particular relates to the insulation layer thereof.
2. Description of the Related Art
With technological advancement, requirements for more versatile electronic products have increased. As such, demand for flexible electronic products has also increased and thereby, demand for embedded passive/active devices in substrate. Embedded passive/active devices are designed with the consideration of requiring minimal circuit board area, high device density, and high product yield and reliability. A capacitor is a common example of one type of passive/active devices.
However, due to the sputtering or high temperature sintering methods applied to fabricate pure inorganic capacitor substrate materials, costs are relatively high due to requirement for specialized machinery and a high temperature process (greater than 800° C.). As such, pure inorganic capacitor substrate materials can not be directly embedded in PCB with low temperature process. Accordingly, low cost printed circuit board (PCB) processes are used to fabricate organic capacitor substrate materials. However, the dielectric constant (DK) of resin/ceramic powder composites of organic capacitor substrate materials cannot reach over 40. Thus, capacitor density for organic capacitor substrate materials is low and applicability thereof, is limited. Using conductive powders to increase the composite DK to over 45 have been disclosed. However, organic capacitor substrate materials having conductive powders are characterized by current leakage, thus limiting application thereof.
Almost half of the capacitor devices applied in electronic products today are decoupling capacitors with capacitance of 1 nF to 1 μF. Capacitor devices buried into substrates can efficiently shrink product volume of electronic products. However, drilling or sealing processes during the fabrication process are complex. Even though a high temperature sintered inorganic capacitor material meets high capacitance density requirements, it cannot be directly formed in substrate as capacitors due to high process temperature (900° C.). Accordingly, the invention discloses a structural design and corresponding materials for fabricating a decoupling capacitor substrate.
In recent year, the embedded capacitor technology is widely discussed, and some low capacitance capacitor devices are utilized in practice. The application thereof is focused in RF modules, however, it should be applied in more fields in future. In fact, the huge patent applications of the embedded capacitor reflect that is a compensative area for related companies.
Following are examples of patents related to powder type or resin formula-based capacitors, all of the patents do not disclose a structure for fabricating capacitors which reduce current leakage or have high-k and high capacitor density.
U.S. Pat. No. 6,657,849 B1 discloses a method for fabricating an embedded capacitor layer in PCB, wherein a thin dielectric layer serves as embedded capacitor. The capacitor structure is a conductive metal clad/dielectric layer, or conductive metal clad/dielectric layer/re-enforcing material layer. Two substrates with the same material and structure are laminated to form an embedded capacitor material. A re-enforcing material layer is used to reduce dimensional deformation from thermal or chemical reactions during the fabrication process. The laminating process is used to avoid gaps between the substrate. The material of the capacitor substrate comprises general ceramic powders, thermosetting polymers, thermoplastic polymers, and the likes. U.S. Pat. No. 7,413,815 B2 utilizes pre-polymers of some polymers such as PET, PEN, PVC, PPS, PI, PA, PA-PI, and the likes for an inter dielectric layer (enforcing layer). Therefore, the substrate structure is re-enforced with an inter dielectric layer of about 1.5 μm to 10 μm.
U.S. Pat. No. 6,905,757 B2 discloses a fabricating method for forming an embedded capacitor layer in a PCB, and in particular relates to a double-sided and thin copper clad laminate plate of high mechanical strength. It emphasized the composition and ratio of resin and powders, wherein the resin must be solvent soluble polyamide resin polymer is used as resin. A dielectric layer, such as a single-sided layer of less than 5 μm, is laminated with a conductive metal clad layer. The coating and baking processes are repeated to form a multi-layered structure with appropriate thickness, and the dielectric layer is then laminated with conductive metal clad layer.
Taiwan Pat. No. 1594811 disclose a lamination board for a capacitor layer and method for fabricating the same, wherein the multi-layered structure is a copper electrode/aluminum oxide barrier layer/modified by an aluminum oxide layer/binding metal layer composed of an Al, Ni, and Cr/copper electrode. However, the lamination board cannot be fabricated by a PCB process.
From 1997 to 2008, many patents such as U.S. Pat. No. 5,688,724 (1997), 6,270,835 B1 (2001), 6,953,721 B2 (2005), 7,217,617 B2 (2007), and 7,323,422 B2 (2008) have disclosed that a multi-layered dielectric layer can be applied in a capacitor or insulation layer of an IC. Almost all of the patents use inorganic material to fabricate the multi-layered structures by a CVD process of IC. Thus, current leakage current from insufficient thickness is minimized.
Accordingly, a novel capacitor structure and related composition is called for having high dielectric constant and minimal current leakage.